How does RAM boost your computer speed
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Saturday, 24 September 2011
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INTRODUCTION TO COMPUTER MEMORY
This write-up provides an extended discussion of system RAM memory structures. It begins with descriptions of the various types of RAM memory devices commonly used in PC-compatible systems. The second phase of the write-up deals with memory organization and structures that are commonly employed with personal computers. Topics discussed here include SIMMs, DIMMs, memory banks, and error checking and correcting schemes. This should enable you to differentiate between the different categories of RAM and identify their normal system board locations and physical characteristics. You should also be able to select appropriate RAM types for a given computer configuration.
MEMORY SYSTEMS
There are normally three types of semiconductor memory found on system board. These include
the system’s ROM BIOS ICs
the system’s RAM memory
the second-level cache memory
All the listed memory types are based on two types of semiconductor RAM technologies—static RAM (SRAM) and dynamic RAM (DRAM). Although they both perform the same basic storage functions, their methods of doing so are completely different. SRAM stores bits in a manner in which they will remain valid as long as power to the chip is not interrupted. On the other hand, DRAM requires periodic refreshing to maintain data, even if electrical power is applied to the chip. Whether the RAM is made up of static or dynamic RAM devices, all RAM systems have the disadvantage of being volatile. This means that any data stored in RAM will be lost if power to the computer is disrupted for any reason. On the other hand, both types of RAM have the advantage of being fast, with the capability to be written to and read from with equal ease. ROM, on the other hand is classified as nonvolatile memory.
Advanced DRAM
Both types of RAM are brought together to create an improved DRAM, referred to as enhanced DRAM (EDRAM). By integrating an SRAM component into a DRAM device, a performance improvement of 40% can be gained. An independent write path allows the system to input new data without affecting the operation of the rest of the chip. These devices are used primarily in L2 cache memories. Another modified DRAM type, referred to as synchronous DRAM (SDRAM), employs special internal registers and clock signals to organize data requests from memory. Unlike asynchronous memory modules, SDRAM devices operate in synchronous with the system clock. Once an initial Read or Write access has been performed on the memory device, additional accesses can be conducted in a high speed burst mode that operates at one access per clock cycle. Special internal configurations also speed up the operation of the SDRAM memory. The SDRAM device employs internal interleaving techniques that permit one side of the memory to be accessed while the other half is completing an operation. Because there are two versions of SDRAM (2-clock and 4-clock), you must make certain that the SDRAM type you are using is supported by the system board’s chipset.
Advanced SDRAM
Advanced versions of SDRAM include:
SDR-SDRAM—Single Data Rate SDRAM. This version of SDRAM transfers data on one edge of the system clock signal.
Ø SGRAM—Synchronous Graphics RAM. This type of SDRAM is designed to handle high-performance graphics operations. It features dual-bank operations that permit two memory pages to be open at the same time.
ESDRAM—Enhanced SDRAM. This advanced form of SDRAM employs small cache buffers to provide high data access rates. This type of SDRAM is used in L2 cache applications.
VCM-SDRAM—Virtual Channel Memory SDRAM. This memory design has onboard cache buffers to improve multiple access times and to provide I/O transfers on each clock cycle.
VCM-SDRAM requires a special chipset to support it.
Ø DDR-SDRAM—Double Data Rate SDRAM. This is a form of SDR-SDRAM that can transfer data on both the leading and falling edges of each clock cycle. This capability doubles the data transfer rate of traditional SDR-DRAM. It is available in a number of standard formats, including SODIMMs for
portables.
Ø EDDR-SDRAM—Enhanced DDR SDRAM. An advanced form of DDR-SRAM that employs onboard cache registers to deliver improved performance. Extended data out (EDO) memory increases the speed at which RAM operations are conducted by cutting out the 10-nanosecond wait time normally required between issuing memory addresses. This is accomplished by not disabling the data bus pins between bus cycles. EDO is an advanced type of fast page-mode DRAM also referred to as hyper page-mode DRAM. The advantage of EDO DRAM is encountered when multiple sequential memory accesses are performed. By not turning off the data pin, each successive access after the first access is accomplished in two clock cycles rather than three.
Special memory devices have also been designed to optimize video memory related activities. Among these devices are video RAM (VRAM) and Windows RAM (WRAM). In typical DRAM devices, access to the data stored inside is shared between the system microprocessor and the video controller. The microprocessor accesses the RAM to update the data in it and to keep it refreshed. The video controller moves data out of the memory to become screen information. Normally, both devices must access the data through the same data bus. VRAM employs a special dual-port access system to speed up video operations. WRAM, a special version of VRAM, is optimized to transfer blocks of data at a time. This allows it to operate at speeds of up to 150% of typical VRAM and costs up to 20% less. A company named Rambus has designed a proprietary DRAM memory technology that promises very high data delivery speeds.
The technology has been given a variety of different names that include Rambus DRAM (RDRAM), Direct Rambus DRAM (DRDRAM), and Rambus inline memory module (RIMM). The RIMM reference applies to a special 184-pin memory module that is designed to hold the Rambus devices. However, their high-speed transfer modes generate considerably more heat than normal DIMMs. Therefore, RIMM modules include an aluminum heat shield, referred to as a heat spreader, to protect the chips from overheating. The Rambus technology employs a special, internal 16-bit data channel that operates in conjunction with a 400MHz clock. The 16- bit channel permits the device to operate at much higher speeds than more conventional 64-bit buses. Although Intel had expressed some interest in exploring the technology for its future system board designs, the fact that it is a proprietary standard might hinder its acceptance in the market., RIMMs look similar to DIMMs, but they have a different pin count. RIMMs transfer data in 16-bit chunks. The faster access and transfer speed generates more heat.
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| RAM |
SRAM
Like Dynamic RAM, SRAM is available in a number of different types. Many of the memory organization techniques described for DRAM are also implemented in SRAM. Asynchronous SRAM—Is standard SRAM and delivers data from the memory to the microprocessor and returns it to the cache in one clock cycle.
Ø Synchronous SRAM—Uses special clock signals and buffer storage to deliver data to the CPU in one clock cycle after the first cycle. The first address is stored and used to retrieve the data while the next address is on its way to the cache.
Ø Pipeline SRAM—Uses three clock cycles to fetch the first data and then accesses addresses within the selected page on each clock cycle.
Ø Burst-mode SRAM—Loads a number of consecutive data locations from the cache, over several clock cycles, based on a single address from the microprocessor. In digital electronics terms, a buffer is a holding area for data shared by devices that operate at different speeds or have different priorities. These devices permit a memory module to operate without the delays that other devices impose. Some types of SDRAM memory modules contain buffer registers directly on the module. The buffer registers hold and retransmit the data signals through the memory chips.
Memory Overhead
DRAM devices, commonly used for the system’s RAM, require periodic refreshing of their data to prevent it from disappearing. Some refreshing is performed by the system’s normal memory reading and writing cycles. However, additional circuitry must be used to ensure that every bit in all the memory registers is refreshed within the allotted timeframe. Another design factor associated with RAM is data error detection. A single, incorrect bit can shut down the entire system instantly. With bits constantly moving in and out of RAM, it is crucial that all the bits be transferred correctly. The most popular form of error detection in PC compatibles is parity checking. In this methodology, an extra bit is added to each word in RAM and checked each time it is used. Parity checking is a simple self test used to detect RAM readback errors. Like refreshing, parity checking requires additional circuitry and memory overhead to operate. When a parity error occurs, a Non-Maskable Interrupt (NMI) signal is generated in the system, causing the BIOS to execute its NMI handler routine. This routine will normally place a parity error message onscreen, along with an option to shut down the system or to continue. In other cases, the system will show a short memory count during the POST and lock up without an error message. Another possibility is that the system will count the memory, lock up, and reboot itself. If the memory error occurs higher in the physical memory device, this situation can occur after the operating system and applications have been loaded and started running. ECC SDRAM is a type of SDRAM that includes a fault detection/correction circuit that can detect and fix memory errors without shutting down the system. Occasionally, the information in a single memory bit can change states, which in turn causes a memory error to occur when the data is read from memory. Using a parity memory scheme, the system can detect that a bit has flipped when the memory is read, but it can only display a “Parity Error” message and freeze up. Although this prevents the bad data from being used or written away in the system, it also erases all current data from RAM. An ECC memory module has the capability to detect and correct a single-bit error, or to detect errors in two bits. The latter condition causes a parity error shutdown to occur as described earlier.
Cache Memory
One method of increasing the memory-access speed of a computer is called caching. This memory management method assumes that most memory accesses are made within a limited block of addresses. Therefore, if the contents of these addresses are relocated into a special section of high-speed SRAM, the microprocessor could access these locations without requiring any wait states. The original Intel Pentium had a built-in first-level cache that could be used for both instructions and data. The internal cache was divided into four 2KB blocks containing 128 sets of 16-byte lines each. Control of the internal cache is handled directly by the microprocessor. The microprocessor’s internal first-level cache is also known as an L1 cache. Many of the older Pentium system boards extended the caching capability of the microprocessor by adding an external, second- level 256KB/512KB memory cache. Like the L1 cache, the second-level cache can also be referred to as an L2 cache. Beginning with the Pentium Pro, Intel began placing the 256KB/512KB L2 cache in the same package with the Pentium processor core (however, it was not integrated directly into the actual IC design). In these cases, there is no additional cache memory on the system board. The primary objective of the cache memory’s control system is to maximize the ratio of hits to total accesses (hit rate) so that the majority of memory accesses are performed without wait states. One way to do this is to make the cache memory area as large as possible (thus raising the possibility of the desired information being in the cache). However, the relative cost, energy consumption, and physical size of SRAM devices work against this technique. Practical sizes for cache memories run between 16KB–512KB. However, the newest microprocessors (that is, Xeon and Itanium) used for server computers have created a third level—L3 cache. These microprocessors can support up to 4MB of cache in the cartridge.
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| Memory Chips |
SIMMS, DIMMS, AND BANKS
In the second generation AT-compatible PCs, manufacturers began using snap-in memory modules that mounted vertically on the system board in sockets. The earliest versions of these snap-in modules were single in-line memory modules (SIMMs). To better accommodate Pentium microprocessors, system boards shifted over to larger dual in-line memory modules (DIMMs). Both types of memory modules employ special snap-in sockets that support the module firmly. They are also keyed so that they cannot be plugged in backward. SIMM modules were traditionally available in 30-pin and 72-pin versions; DIMMs are larger 168-pin boards. SIMM and DIMM sockets are quite distinctive in that they are normally arranged side by side. However, they can be located anywhere on the system board. SIMMs typically come in 30-pin/8-bit or 72- pin/32-bit data-storage configurations. The 8-bit modules must be arranged in banks to match the data bus size of the system’s microprocessor. To work effectively with a 32-bit microprocessor, a bank of four 8-bit SIMMs would need to be used. Conversely, a single 32-bit SIMM could do the same job. DIMMs, on the other hand, typically come in 32-bit and 64-bit bus widths to service more powerful microprocessors. These devices must be organized properly to accommodate the size of the system’s data bus. In both cases, the modules can be accessed in smaller 8- and 16-bit segments. SIMMs and DIMMs also come in 9-, 36-, and 72-bit versions that include parity-checking bits for each byte of storage (that is, a 36-bit SIMM provides 32 data bits and 4 parity bits—one for each byte of data). PCs are typically sold with less than their full RAM capacity. This enables users to purchase a less expensive computer to fit their individual needs and yet retain the option to install more RAM if future applications call for it. SIMM and DIMM sizes are typically specified in an a-by-b format. For example, a 2x32 SIMM specification indicates that it is a dual, non-parity, 32-bit (4-byte) device. Using this scheme, the capacity is derived by multiplying the two numbers, and then dividing by 8 (or 9 for parity chips). Some newer system boards feature a three-DIMM slot arrangement, referred to as a split-bank arrangement. When you are working with this board, you must refer to its user manual to determine what types of memory can be used. The reason for this is that split-bank arrangements use a different specification for DIMM slot 1 than they do for DIMM slots 2 and 3. The odd slot will normally be organized into one bank while the other two slots combine to form the second bank. If you are not careful when populating these slots, you might create a situation in which the system’s memory controller cannot access all the installed RAM.
RAM SPEEDS
Another important factor to consider when dealing with RAM is its speed. Manufacturers mark RAM devices with speed information. DRAM modules are marked with a numbering system that indicates the number of clock cycles required for the initial Read operation, followed by information about the number of reads and cycles required to move a burst of data. As an example, a Fast Page Mode DRAM marked as 6-3-3-3 requires 6 cycles for the initial read and 3 cycles for each of three successive reads. This will move an entire 4- byte block of data. EDO and FPM can operate with bus speeds up to 66MHz. SDRAM devices are marked a little differently. Because they are designed to run synchronously with the system clock and use no wait states, a marking of 3:3:3 at 100MHz on an SDRAM module specifies that
Ø The CAS signal setup time is 3 bus cycles.
Ø The RAS to CAS changeover time is 3 cycles.
Ø The RAS signal setup time is 3 clock cycles.
The bus speed is specified in MHz. These memory modules have been produced in the following specifications so far:
Ø PC66 (66MHz or 15 nanoseconds)
Ø PC83 (83MHz or 12 nanoseconds)
Ø PC100 (100MHz or 10 nanoseconds)
Ø PC133 (133MHz or 8 nanoseconds)
Ø PC150 (150MHz or 4.5 nanoseconds)
Ø PC166 (166MHz or 4 nanoseconds)
Continued advancements in memory module design have made the MHz and CAS time ratings obsolete. Onboard buffering and advanced access strategies have made these measurements inconsequential. Instead, memory performance is being measured by total data throughput (also referred to as bandwidth) and is being measured in terms of Gigabytes per second (Gbps). As an example, some of the new standard specifications include
Ø PC1600 (1.6Gbps/200MHz/2:2:2)
Ø PC2100 (2.1Gbps/266MHz/2:3:3)
Ø PC2400 (2.6Gbps/300MHz/3:3:3)
Ø PC2700 (2.6Gbps/333MHz/3:3:3)
Ø PC3200 (3.2Gbps/400MHz/3:3:3)
When dealing with RAMBUS memory devices, you should be aware that they use special, proprietary, high-speed buses to interact with the microprocessor. Because the memory bus is proprietary to the RAMBUS design, other memory types cannot be substituted for them. These devices have existed in four different speed ratings. The original RAMBUS devices were rated for 400MHz operation. As the following list indicates, newer RAMBUS devices can be used with even faster memory buses:
Ø PC-600 (600MHz RAMBUS/RDRAM/RIMM)
Ø PC-700 (700MHz RAMBUS/RDRAM/RIMM)
Ø PC-800 (800MHz RAMBUS/RDRAM/RIMM)
The system BIOS on these boards have a built-in autodetect function that can be used to automatically detect the type of memory devices that are installed and configure the memory bus specifically for it. Mixing memory device types can cause assorted memory errors including complete system failures, random lockups, and soft errors. If the autodetect setting is not selected in the BIOS, it is possible to set the system up to under clock or over clock the memory bus. The system board’s documentation will provide information about the types of devices it can use and their speed ratings. It is important to install RAM compatible with the bus speed that the system is running. Normally, installing RAM rated faster than the bus speed will not cause problems. However, installing slower RAM or mixing RAM speed ratings within a system might cause it not to start or toperiodically lock up
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